BBB Enabling PWM

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These notes are based on the 3.8.13-bone70 complete installation as described over at BBB New Debian Image.

Preparing

In /opt/source/beaglebone-universal-io you'll find some general device drivers for the BBB.

Since BBB uses the FDT (Flattened Device Tree), where a general driver performs the most of the work, no special driver is needed for PWM.

There are two steps in enabling a device:

1. Setup the multiplexing of the pins (i.e. connect the internal device to a pin accessible on the outside)

2. Setup the peripheral (the internal device such as PWM, GPIO, etc.) to the pin assigned above

Ensure that your general pinmux is setup for defaults by ensuring that the /sys/devices/ocp.N (with N currently showing 3) exists. If not then perform:

root@beaglebone$] cd /opt/source/beaglebone-universal-io
root@beaglebone$] echo cape-universaln > /sys/devices/bone_capemgr.*/slots

expect an output with this included:

drwxr-xr-x  3 root root    0 May 24 09:24 P8_07_pinmux.15
drwxr-xr-x  3 root root    0 May 24 09:24 P8_08_pinmux.16
drwxr-xr-x  3 root root    0 May 24 09:24 P8_09_pinmux.17
drwxr-xr-x  3 root root    0 May 24 09:24 P8_10_pinmux.18
drwxr-xr-x  3 root root    0 May 24 09:24 P8_11_pinmux.19
drwxr-xr-x  3 root root    0 May 24 09:24 P8_12_pinmux.20
drwxr-xr-x  3 root root    0 May 24 09:24 P8_13_pinmux.21
drwxr-xr-x  3 root root    0 May 24 09:24 P8_14_pinmux.22
drwxr-xr-x  3 root root    0 May 24 09:24 P8_15_pinmux.23
drwxr-xr-x  3 root root    0 May 24 09:24 P8_16_pinmux.24
drwxr-xr-x  3 root root    0 May 24 09:24 P8_17_pinmux.25
drwxr-xr-x  3 root root    0 May 24 09:24 P8_18_pinmux.26
drwxr-xr-x  3 root root    0 May 24 09:24 P8_19_pinmux.27
drwxr-xr-x  3 root root    0 May 24 09:24 P8_26_pinmux.28
drwxr-xr-x  3 root root    0 May 24 09:24 P9_11_pinmux.29
drwxr-xr-x  3 root root    0 May 24 09:24 P9_12_pinmux.30
drwxr-xr-x  3 root root    0 May 24 09:24 P9_13_pinmux.31
drwxr-xr-x  3 root root    0 May 24 09:24 P9_14_pinmux.32
drwxr-xr-x  3 root root    0 May 24 09:24 P9_15_pinmux.33
drwxr-xr-x  3 root root    0 May 24 09:24 P9_16_pinmux.34
drwxr-xr-x  3 root root    0 May 24 09:24 P9_17_pinmux.35
drwxr-xr-x  3 root root    0 May 24 09:24 P9_18_pinmux.36
drwxr-xr-x  3 root root    0 May 24 09:24 P9_21_pinmux.37
drwxr-xr-x  3 root root    0 May 24 09:24 P9_22_pinmux.38
drwxr-xr-x  3 root root    0 May 24 09:24 P9_23_pinmux.39
drwxr-xr-x  3 root root    0 May 24 09:24 P9_24_pinmux.40
drwxr-xr-x  3 root root    0 May 24 09:24 P9_26_pinmux.41
drwxr-xr-x  3 root root    0 May 24 09:24 P9_27_pinmux.42
drwxr-xr-x  3 root root    0 May 24 09:24 P9_30_pinmux.43
drwxr-xr-x  3 root root    0 May 24 09:24 P9_41_pinmux.44
drwxr-xr-x  3 root root    0 May 24 09:24 P9_42_pinmux.46
drwxr-xr-x  3 root root    0 May 24 09:24 P9_91_pinmux.45
drwxr-xr-x  3 root root    0 May 24 09:24 P9_92_pinmux.47

Connecting pins to the PWM Chip

Now in order to connect the PWM to a pin look up what pin PWM can be output to in the cape-universaln-00A0.dts file. You'll find that you can connect them to for instance P9.14, P9.16, P9.21, and P9.22.

To convince yourself on your choice issue this command:

root@beagelbone$] config-pin -l P9.14

expect this output:

default gpio gpio_pu gpio_pd pwm

Now in order to enable the pwm to the P9.14 pin issue:

root@begalebone$] config-pin P9.14 pwm

To ensure yourself that you've got the PWM connected to the pin issue

root@beaglebone$] cat /sys/devices/ocp.3/P9_14_pinmux.32/state

expect this output

pwm

Locate the PWM control files

Now where are the PWM?

Issue

root@beaglebone$] ll /sys/class/pwm/

and expect this

total 0
drwxr-xr-x  2 root root    0 Jan  1  2000 .
drwxr-xr-x 59 root root    0 Jan  1  2000 .. 
--w-------  1 root root 4096 Jan  1  2000 export
lrwxrwxrwx  1 root root    0 May 24 09:30 pwmchip0 -> ../../devices/ocp.3/48300000.epwmss/48300200.ehrpwm/pwm/pwmchip0
lrwxrwxrwx  1 root root    0 May 24 09:30 pwmchip2 -> ../../devices/ocp.3/48300000.epwmss/48300100.ecap/pwm/pwmchip2
lrwxrwxrwx  1 root root    0 May 24 09:30 pwmchip3 -> ../../devices/ocp.3/48302000.epwmss/48302200.ehrpwm/pwm/pwmchip3
lrwxrwxrwx  1 root root    0 May 24 09:30 pwmchip5 -> ../../devices/ocp.3/48304000.epwmss/48304200.ehrpwm/pwm/pwmchip5
lrwxrwxrwx  1 root root    0 May 24 09:30 pwmchip7 -> ../../devices/ocp.3/48304000.epwmss/48304100.ecap/pwm/pwmchip7
--w-------  1 root root 4096 Jan  1  2000 unexport

How to interpret this output. First we'll have to look into this technical document over the AM335x Sitara Processors. (If the document is not available search for AM335 Sitara Processor Technical Referance Manual - it's a ~22 MB document).

Looking for address 48300000 in the memory map, you'll find this is in the L4_PER block, and this is listed as the “PWM subsystem 0″, and 48300200 is the EHR0 PWM channel and 48300100 the eCAP0 PWM. Also, address 4830200 is the “PWM subsystem 1″, and address 4830400 is the “PWM subsystem 2″.

Now, using the pin names found from the BeagleBoard.org – bone101 page served from the board, and deductive reasoning you'll come up with the following maping of pin to export number:

export number 	pin name 	pins
0 	        EHRPWM0A 	P9.22,P9.31
1 	        EHRPWM0B 	P9.21,P9.29
2 	        ECAPPWM0 	P9.42
3 	        EHRPWM1A 	P9.14,P8.36
4 	        EHRPWM1B 	P9.16,P8.34
5 	        EHRPWM2A 	P8.19,P8.45
6 	        EHRPWM2B 	P8.13,P8.46
7 	        ECAPPWM2 	P9.28

Enable the pin for the PWM

Now we're ready to enable a pwm for instance P9_14. This is done by looking up P9.14 in the table above and see that it is export number 3. So perform

root@beaglebone$] echo 3 > /sys/class/pwm/export

NOTE here there needs to be a space between 3 and >!

root@beaglebone$] ls /sys/class/pwm/

will give you this

export  pwm3  pwmchip0  pwmchip2  pwmchip3  pwmchip5  pwmchip7  unexport

No issuing

root@begalebone$] ll /sys/class/pwm/pwm3/

will output

total 0
drwxr-xr-x 3 root root    0 May 24 09:52 .
drwxr-xr-x 4 root root    0 May 24 09:24 ..
lrwxrwxrwx 1 root root    0 May 24 09:57 device -> ../../../48302200.ehrpwm
-rw-r--r-- 1 root root 4096 May 24 09:57 duty_ns
-rw-r--r-- 1 root root 4096 May 24 09:57 period_ns
-rw-r--r-- 1 root root 4096 May 24 09:57 polarity
drwxr-xr-x 2 root root    0 May 24 09:57 power
-rw-r--r-- 1 root root 4096 May 24 09:57 run
lrwxrwxrwx 1 root root    0 May 24 09:52 subsystem -> ../../../../../../class/pwm
-rw-r--r-- 1 root root 4096 May 24 09:52 uevent

The files of interest here are the duty_ns, period_ns and polarity.

The polarity sets the polarity of the output signal. Typically setup once at initialisation.

The period_ns sets the period time active for the PWM signal. In nano seconds. Typically setup once at initialisation.

The duty_ns sets the duty cycle for the PWM signal - i.e. the length of the period time the PWM signal is active. In nano seconds. This one is constantly updated with the desired duty cycle.

Control the PWM

No you can control the PWM from the command line or you can write a C/C++ program that will open, write and close the above mentioned files in order to control the PWM.

Acknowledgements

Thanks goes to this page for inspiration.